#=======================================================
# Presentation of the tb
#=======================================================

# Main file to launch all test scripts
# Used to have a unique point of definition for the 
# eicroc class (instance of the ASIC by B-Y KY)

#=======================================================
# Imports
#=======================================================

# OS
import ctypes
import os
import sys
curpath = os.getcwd()
sys.path.insert(0,curpath)
import subprocess
from datetime import datetime

# Parameters, testing functions, etc...

from eicrocdaqcore import *
from eicrocdaqcore.testing.computing import *
from eicrocdaqcore.testing.asicParam import *
from eicrocdaqcore.testing.hardware import *
from eicrocdaqcore.testing.Interaction_user_param import *
from eicrocdaqcore.testing.misc import *
import eicrocdaqcore.eicroc0_param as eic0p

# Different testbenches

from script.tb_threshold import *
from script.tb_charge import *
from script.tb_cor_adc import *
from script.tb_cor_th import *
from script.tb_min_injection import *
from script.tb_xtalk import *
from script.tb_debug import *

lib = ctypes.cdll.LoadLibrary('./libEICROC.so')
libinst = lib.eicroc_new()

#=======================================================
# Main part
#=======================================================

if __name__ == "__main__":

    # =======================================================
    # ASIC definition
    # =======================================================

    eicroc0 = eic0p.eicroc_param()

    (options, args) = getParser()
    eic = eicroc(lib,libinst)

    ret = eic.setup(options.asicAddr)
    if ret < 1:
       print(f"ERROR Setup hardware %d" %(ret))
    else:
        print(f"Testing python script\n")

        eic.start_stopn_acq(0)                      # Stop Acquisition
        eic.hard_rst()

        # CLOCKS ==========================

        eic.en_clk160(1)                            # Enable 160MHz clock used by EICROC0
        eic.en_clk40(1)                             # Enable 40MHz clock used by the PLLs (no interaction with EICROC0!!)
        
        eic.set_dout_sig(1)  # inverted on PCB
        eic_setsignal(eic)

        tb_ctr = './eicrocdaqcore/testing/tb_counter.txt'

        tb_sel = tb_select()
        tb_run = wr_tbNb_file(tb_ctr, tb_sel)
        match tb_sel:

            case 0:
                test_threshold(eic, eicroc0, tb_run)
            case 1:
                test_cor_th(eic, eicroc0, tb_run)
            case 2:
                test_cor_adc(eic, eicroc0, tb_run)
            case 3:
                test_charge(eic, eicroc0, tb_run)
            case 4:
                test_xtalk(eic, eicroc0, tb_run)
            case 5:
                test_min_injection(eic, eicroc0, tb_run)
            case 75:
                test_debug(eic, eicroc0, tb_run)

        eic.byebye()

    del eic
    unload_lib(lib)

    exit()