# Base file is cfg_all_on.txt ######################################### # INDIRECT REGISTERS, GLOBAL ADDRESSING # ######################################### #indirect_register_addr, value , # Comment 0x200 , B'11101000 , # Bit7 : choice_dig_probe # Bit6 : EN_Dout # Bit5 : EN_Trigout # Bit4 : FIFO_DELL_40MHz # Bit3 : START_COUNTER # Bit2 : VD_CTDC_P_DAC_EN # Bit1 : CTRL_IN_CTDC_P_EN # Bit0 : CTRL_IN_CTDC_P_SIG 0x201 , B'11100000 , # Bit7 : EN_REF_BG # Bit6 : FOLLOWER_CTDC_EN # Bit5-0 : BIAS_I_CTDC_D[5:0] 0x202 , B'00000000 , # Bit7-4 : VD_CTDC_N_D # Bit3-0 : CTRL_IN_CTDC_P_D[4:1] 0x203 , B'00000000 , # Bit7 : BIAS_CAL_D2C_CTDC_P_EN # Bit6 : EN_MASTER_CTDC_VOUT_INIT # Bit5 : EN_MASTER_CTDC_DLL # Bit4 : BIAS_FOLLOWER_CAL_P_CTDC_EN # Bit3-0 : BIAS_FOLLOWER_CAL_P_CTDC[3:0] 0x204 , B'00000000 , # Bit7-4 : VD_FTDC_P_D[4:1] # Bit3-0 : VD_CTDC_P_D[4:1] 0x205 , B'01000000 , # Bit7 : VD_CTDC_N_FORCE_MAX # Bit6 : VD_CTDC_N_DAC_EN # Bit5 : CTRL_IN_FTDC_P_EN # Bit4 : CTRL_IN_FTDC_P_SIG # Bit3-0 : CTRL_IN_FTDC_P_D[4:1] 0x206 , B'00100000 , # Bit7 : BIAS_FOLLOWER_CAL_P_FTDC_EN # Bit6 : VD_FTDC_P_DAC_EN # Bit5 : VD_FTDC_N_FORCE_MAX # Bit4 : VD_FTDC_N_DAC_EN # Bit3-0 : VD_FTDC_N_D[4:1] 0x207 , B'01000001 , # Bit7 : EN_MASTER_FTDC_VOUT_INIT # Bit6 : EN_MASTER_FTDC_DLL # Bit5-0 : FTDC_CALIB_FREQUENCY[5:0] 0x208 , B'11110000 , # Bit7 : ON_rtr *** 1 # Bit6 : FOLLOWER_FTDC_EN # Bit5-0 : BIAS_I_FTDC_D[5:0] 0x209 , B'11100000 , # Bit7-4 : BIAS_FOLLOWER_CAL_P_FTDC_D[3:0] # Bit3-0 : BIAS_CALL_DAC_CTDC_P_D[3:0] 0x20A , B'00000000 , # Bit7-0 : 10bitDAC[7:0] Board ASIC Alone - Used to change the discriminator threshold # Set such that the discriminator triggers above the coupling signal at preamp output 0x20B , B'00000000 , # Bit7-4 : dac_biaspa[5:2] # Bit3-2 : dac_biaspa[1:0] = Id[1:0], with Id[0] = 200uA and Id[1] = 400uA # Bit1-0 : 10bitDAC[9:8] 0x20C , B'11000000 , # Bit7 : ref_100uA # Bit6 : ON_refadc # Bit5-0 : dacb_pulser[5:0] - Used to change the cmd_pulse amplitude (000000 is the max value) 0x20D , B'01100000 , # Bit7-6 : S[1:0] # Bit5-0 : dac_bias_rtr[5:0] 0x20E , B'10111111 , # Bit7 : SEU_TIME_OUT # Bit6-3 : TA_SELECT_GAIN[3:0] # Bit2 : cmd_hyst # Bit1 : ON_cp # increase probe preamp from 200 to 300 mV # Bit0 : ON_rtest - Rtest used in the cmd_pulse 0x20F , B'00110000 , # Bit7 : SYNC_OUT # Bit6 : MODE_FTDC_TOA_S0 # Bit5 : MODE_FTDC_TOA_S1 # Bit4 : FORCE_EN_CLK **** 1 # Bit3 : FORCE_EN_OUTPUT_DATA force a garder sortie # Bit2 : MODE_TOA_DIRECT_OUTPUT # Bit1 : EN_BUFFER_CTDC # Bit0 : EN_BUFFER_FTDC 0x210 , B'01001001 , # Bit7-5 : delay7[2:0] - Delay bits used for the ADC # Bit4-2 : delay65[2:0] - Delay bits used for the ADC # Bit1-0 : delay43[2:1] - Delay bits used for the ADC 0x211 , B'00100110 , # Bit7 : delay43[0] - Delay bits used for the ADC # Bit6-4 : delay20[2:0] - Delay bits used for the ADC # Bit3 : CALIB_CHANNEL # Bit2 : EN_NOR16 # Bit1 : DIS_clkgating - Clockgating used on the ADC # Bit0 : NC ## probe<3:0> = probe_dc1 on PCB # 1 = in_ctest ; # 4 = vbi_pa ; # 5 = vbo_pa ; # 6 = vb_TZ ; # 7 = vb_dc ; # 8 = vbi_disc ; # 11 = vbo_disc ; # 12 = vcasc_disc ; # 13 = vcasc_pa ; # 14 = vth ## probe<7:4> = probe dc2 (TDC) 0x212 , B'0000-0001 , # Bit7-0 : probe[7:0] - used to look at DC signals define above ################################################ # END OF INDIRECT REGISTERS, GLOBAL ADDRESSING # ################################################ ##################################################################################################################################################################################### ##################################################################################################################################################################################### ############################################## # DIRECT REGISTERS, LOCAL (PIXEL) ADDRESSING # ############################################## ########## COLUMN 0 - LEFT COLUMN # Pixel (0,0) --- TOP 0x020 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x021 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x022 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x023 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x024 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (0,1) - MIDDLE TOP 0x025 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x026 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x027 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x028 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x029 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (0,2) - MIDDLE BOTTOM 0x02A , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x02B , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x02C , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x02D , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x02E , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (0,3) - BOTTOM 0x02F , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x030 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x031 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x032 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x033 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] ########## COLUMN 1 - 2ND LEFT COLUMN # Pixel (1,0) 0x040 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x041 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x042 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x043 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x044 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (1,1) 0x045 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x046 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x047 , B'00010000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x048 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x049 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (1,2) 0x04A , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x04B , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x04C , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x04D , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x04E , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (1,3) 0x04F , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x050 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x051 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x052 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x053 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] ########## COLUMN 2 - 3RD LEFT COLUMN # Pixel (2,0) 0x080 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x081 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x082 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x083 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x084 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (2,1) 0x085 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x086 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x087 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x088 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x089 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (2,2) 0x08A , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x08B , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x08C , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0]] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x08D , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x08E , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (2,3) 0x08F , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x090 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x091 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x092 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x093 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] ########## COLUMN 3 - RIGHT COLUMN # Pixel (3,0) 0x100 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x101 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x102 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x103 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x104 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (3,1) 0x105 , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x106 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x107 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x108 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x109 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (3,2) 0x10A , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x10B , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x10C , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x10D , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x10E , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] # Pixel (3,3) 0x10F , B'11000000 , # Bit7 : On_disc # Bit6-0 : vth_cor[6:0] 0x110 , B'01000000 , # Bit7 : disable_integ # Bit6-0 : vref_cor[6:0] 0x111 , B'00000000 , # Bit7 : EN_digprobe # Bit6-4 : probe[2:0] # Bit3 : disable_pa # Bit2 : ON_ctest # Bit1-0 : cd [1:0] 0x112 , B'00000001 , # Bit7 : INIT_DAC_B_TDC # Bit6-1 : DAC_CAL_CTDC [5:0] # Bit0 : EN_TDC 0x113 , B'00000000 , # Bit7 : mask_adc # Bit6 : EN_TUNE_GAIN_ADC # Bit5-0 : DAC_CAL_FTDC [5:0] ################################################## # END DIRECT REGISTERS, LOCAL (PIXEL) ADDRESSING # ##################################################