Pour vous authentifier, privilégiez eduGAIN / To authenticate, prefer eduGAINeu

Séminaires transverses

Machine Learning in digital electronics devices for real-time DAQ in HEP

par M. Yun-Tsung Lai (KEK, Tsukuba - Japan)

Europe/Paris
200/1-101 - Salle 101 (IJCLab)

200/1-101 - Salle 101

IJCLab

50
Montrer la salle sur la carte
Description

In the modern DAQ systems of High Energy Physics experiments, trigger systems are responsible for real-time data processing to reconstruct the detector signatures, where FPGA are one of the most popular computing platform for implementation. The High Level Synthesis (HLS) techniques enables Machine Learning (ML) inference in FPGA devices for reconstruction algorithm development. In the present high-end FPGA System-On-Chip (SoC) architecture, there are also new options of computation acceleration engines in addition to FPGA fabric. This report will briefly go through our study on the ML inference in FPGA techniques in KEK. We will also discuss about the application in different parts of the systems within DAQ in experimental HEP.

Zoom link : https://ijclab.zoom.us/j/93068642561?pwd=3EAtbYbx0zIDxSteZR9x4gLEylMxYD.1