Name: CALICE/EUDET Electronics
Start: 2007-03-23T10:00:00+01:00
End: 2007-03-23T16:00:00+01:00
Location: CERN Bdg 40

CALICE/EUDET Electronics

Friday, March 23, 2007 - 10:00 AM

Monday, March 19, 2007
Tuesday, March 20, 2007
Wednesday, March 21, 2007
Thursday, March 22, 2007
Friday, March 23, 2007
10:00 AM introduction - Christophe de LA TAILLE
introduction
- Christophe de LA TAILLE
10:00 AM - 10:10 AM
Room: 40-SS-C01
10:10 AM hardroc results - Nathalie SEGUIN-MOREAU
hardroc results
- Nathalie SEGUIN-MOREAU
10:10 AM - 10:25 AM
Room: 40-SS-C01
10:25 AM dhcal readout - Clement JAUFFRET
dhcal readout
- Clement JAUFFRET
10:25 AM - 10:35 AM
Room: 40-SS-C01
10:35 AM dhcal pcb - Herve MATHEZ
dhcal pcb
- Herve MATHEZ
10:35 AM - 10:45 AM
Room: 40-SS-C01
10:45 AM dhcal prototype - Imad Laktineh
dhcal prototype
- Imad Laktineh
10:45 AM - 10:55 AM
Room: 40-SS-C01
10:55 AM DHCAL discussion : status and plans - all
DHCAL discussion : status and plans
- all
10:55 AM - 11:55 AM
Room: 40-SS-C01
11:55 AM DAQ overview - Matthew WING
DAQ overview
- Matthew WING
11:55 AM - 12:05 PM
Room: 40-SS-C01
12:05 PM DAQ2 status and plans - Paul DAUNCEY
DAQ2 status and plans
- Paul DAUNCEY
12:05 PM - 12:20 PM
Room: 40-SS-C01
12:20 PM software status - Roman POESCHL
software status
- Roman POESCHL
12:20 PM - 12:30 PM
Room: 40-SS-C01
12:35 PM lunch
lunch
12:35 PM - 2:05 PM
Room: 40-SS-C01
2:05 PM SPIROC status - Julien FLEURY
SPIROC status
- Julien FLEURY
2:05 PM - 2:20 PM
Room: 40-SS-C01
2:20 PM AHCAL EUDET module - Felix SEFKOW
AHCAL EUDET module
- Felix SEFKOW
2:20 PM - 3:05 PM
Room: 40-SS-C01
3:05 PM SKIROC status - Julien FLEURY
SKIROC status
- Julien FLEURY
3:05 PM - 3:20 PM
Room: 40-SS-C01
3:20 PM low power 12 bit ADC - Daniel DZAHINI
low power 12 bit ADC
- Daniel DZAHINI
3:20 PM - 3:35 PM
Room: 40-SS-C01
3:40 PM ECAL EUDET module : status and plans - all
ECAL EUDET module : status and plans
- all
3:40 PM - 4:00 PM
Room: 40-SS-C01

Choose timezone