Name: CALICE/EUDET Electronics
Start: 2007-07-12T10:00:00+02:00
End: 2007-07-12T18:00:00+02:00
Location: cern bdg 304

Monday, July 9, 2007
Tuesday, July 10, 2007
Wednesday, July 11, 2007
Thursday, July 12, 2007
10:00 AM spiroc testboard - Ludovic RAUX
spiroc testboard
- Ludovic RAUX
10:00 AM - 10:20 AM
Room: 304-001
10:20 AM AHCAL readout & spiroc tests - Felix SEFKOW
AHCAL readout & spiroc tests
- Felix SEFKOW
10:20 AM - 10:40 AM
Room: 304-001
10:40 AM discussion on spiroc tests
discussion on spiroc tests
10:40 AM - 12:20 PM
Room: 304-001

12:20 PM lunch break
lunch break
12:20 PM - 2:00 PM
Room: 304-001
2:00 PM dhcal prototype design and performance - Imad et al.
dhcal prototype design and performance
- Imad et al.
2:00 PM - 2:20 PM
Room: 304-001
2:20 PM first drawings of Ecal eudet module - Julien FLEURY
first drawings of Ecal eudet module
- Julien FLEURY
2:20 PM - 2:35 PM
Room: 304-001
2:35 PM Wafer + ASU + eDIF - Remy CORNAT
Wafer + ASU + eDIF
- Remy CORNAT
2:35 PM - 2:50 PM
Room: 304-001
2:50 PM ECAL-DIF interface - Bart Hommels
ECAL-DIF interface
- Bart Hommels
2:50 PM - 3:05 PM
Room: 304-001
3:05 PM DIF-LDA interface - Dave BAILEY
DIF-LDA interface
- Dave BAILEY
3:05 PM - 3:20 PM
Room: 304-001
3:20 PM Test slab - Bart Hommels
Test slab
- Bart Hommels
3:20 PM - 3:35 PM
Room: 304-001
3:35 PM ODR - Andrezj Misiejuk
ODR
- Andrezj Misiejuk
3:35 PM - 3:50 PM
Room: 304-001
3:50 PM Networking - Mate KELLY
Networking
- Mate KELLY
3:50 PM - 4:05 PM
Room: 304-001
4:05 PM break
break
4:05 PM - 4:20 PM
Room: 304-001

4:20 PM discussion on next steps
discussion on next steps
4:20 PM - 5:20 PM
Room: 304-001